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PowerPC 440EPx - CPU Performance 400-667MHz - Features DDR1/2 Memory Controller, GPIO, PCI, USB 2.0 Host & Device
Product Status: Production Release
General Description
With speeds of up to 667 MHz, support for floating-point operations, USB 2.0,
Gigabit Ethernet, security and NAND Flash interfaces, low power dissipation
and a small footprint, the PowerPC 440EPx embedded processor is ideally suited
to a wide range of high-performance applications, including imaging, industrial
control and networking.
To enhance overall throughput, the PowerPC 440 superscalar core incorporates
a 7-stage pipeline and executes up to two instructions per cycle. Its large
32-Kbyte data cache and 32-Kbyte instruction cache are 64-way set-associative.
Versatile configurations enhance performance tuning while optional parity protection
preserves data integrity. For additional system performance, the PowerPC 440
core includes dynamic branch prediction and 24 multiply accumulate instructions
(MAC) that can be used for signal processing or other numerical tasks, as well
as non-blocking caches that can be managed in either write-through or write-back
mode.
Features
- Speed (frequency): 400 MHz to 667 MHz
- Performance: 2.0 DMIPS/MHz (1,334 DMIPS @ 667 MHz peak)
- 5-stage FPU with 2.0 MFLOPS/MHz (SP/DP); hardware support for IEEE 754; single-precision and double-precision operation with 32 64-bit floating-point registers
- On-chip IPSec/SSL acceleration (optional)
- NAND Flash controller. Supports one to four banks of NAND Flash memory devices; direct interfacing to discrete NAND Flash devices(up to four devices) and SmartMedia Card socket (22-pins); 4-Mbyte - 256-Mbyte devices sizes supported; 512-byte +16-byte or 2-Kbyte +64-byte device page sizes supported; DMA support allows direct, no processor-intervention block copy from NAND Flash out to SDRAM; boot-from-NAND supported
- On-chip double data rate 1/2 (DDR1/2) SDRAM controller with 32/64-bit interface, 2.6-Gbyte/s peak data rate and optional ECC
- Support for two banks of DDR SDRAM memory of up to 1 Gbyte each, maximum capacity of 2 Gbytes
- Support for 256, 512-Mbit and 1-Gbyte DDR devices, with CAS latencies of 2 or 3
- 32-bit PCI V2.2, 3.3-V interface supporting frequencies of up to 66 MHz
- USB 2.0 device controller, USB 2.0 Host controller and one on-chip USB 2.0 PHY. A second USB PHY can be attached off-chip by means of a UTMI interface.
- (2) Ethernet 10/100/1000-Mbit/s, full-duplex MACs supporting GMII/MII, TBI, RTBI, RGMII, SMII interfaces. Memory access layer (MAL) provides DMA capability to both Ethernet channels
- Up to 83 MHz, 30-bit address bus, 32-bit data bus external bus control(EBC) interface
- Support for up to 6 ROM, RAM, or slave peripheral I/O devices
- 4-channel DMA support for external peripherals
- External bus master controller for access to internal peripherals
- Support for memory-to-memory, peripheral-to-memory, and memory-to-peripheral transfers
- Scatter/gather capability
- Up to four UARTs (1x 8-pin, or 2x 4-pin, or 4x 2-pin, or 1x4-pin and 2x2-pin)
- Two IIC (with one integrated boot strap controlle
- One SPI serial interface
- 4-channel DMA – available for internal and external use
- Programmable interrupt controller with 10 external inputs, 54 internal inputs
- Programmable timers
- General-purpose I/O (64)
- Support for JTAG board testing, JTAG debuggers, and 4xx instruction trace interface
- RoHS compliant version available (lead-free)
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